This project has stalled, there has been no progress in 2018 and I'd be lucky if I can get anywhere in 2019.

I have:
  • An architecture that seems to work well, simple yet complete and efficient
  • One bit of working memory
  • One bit slice of the ALU including fast carry
  • A working emulator (which will be used as a run-time check)
  • An assembler
  • A Forth style language including basic operations, control flow, multiply and divide (16, 32 and 64 bit integers, floating point) and some OS calls.
  • Two RPi3s talking back to back at acceptable speed over GPIO, so I believe that a RPi can be used as clock, memory, IO and as a sanity check.
Which may not seem like a lot, but it's definitely coming together.

Current tasks are: 
  1. Should the data stack be descending not ascending?  A descending stack would have little endian variables and would copy to memory better as it's natural to point to the start, not end, of a memory block.  The call stack can remain descending, it's small and the other end of the data stack can be the heap.
  2. Profile the instructions actually used - most must never be used.
  3. Understand fbcc and get it going - it's the only way I'll find out what I'm missing.
  4. Look at tcc (or maybe lcc) - can I port it to my instruction set where everything is 16 bits?
  5. PCBs?  Can I get away without the expense?  For example, can I print onto A4 paper and glue that to one side of perfboard?   How do I connect matrix board bitslices?
  6. Build a complete bitslice, that's 6 bits of memory, two constants (0 and 1) and one bitslice of the ALU all addressed by two read variables and one write variable.   The inputs are three registers at three bits each plus 3 bits to specify the ALU instruction, the output is witten to the write register. 
  7. Plan out the detail of the instruction set decode
  8. Build for real...